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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="API documentation for the Rust `FeatureInfo` struct in crate `raw_cpuid`."><meta name="keywords" content="rust, rustlang, rust-lang, FeatureInfo"><title>raw_cpuid::FeatureInfo - Rust</title><link rel="stylesheet" type="text/css" href="../normalize.css"><link rel="stylesheet" type="text/css" href="../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" type="text/css" href="../dark.css"><link rel="stylesheet" type="text/css" href="../light.css" id="themeStyle"><script src="../storage.js"></script><noscript><link rel="stylesheet" href="../noscript.css"></noscript><link rel="shortcut icon" href="../favicon.ico"><style type="text/css">#crate-search{background-image:url("../down-arrow.svg");}</style></head><body class="rustdoc struct"><!--[if lte IE 8]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="sidebar"><div class="sidebar-menu">☰</div><a href='../raw_cpuid/index.html'><div class='logo-container'><img src='../rust-logo.png' alt='logo'></div></a><p class='location'>Struct FeatureInfo</p><div class="sidebar-elems"><div class="block items"><a class="sidebar-title" href="#methods">Methods</a><div class="sidebar-links"><a href="#method.brand_index">brand_index</a><a href="#method.cflush_cache_line_size">cflush_cache_line_size</a><a href="#method.extended_family_id">extended_family_id</a><a href="#method.extended_model_id">extended_model_id</a><a href="#method.family_id">family_id</a><a href="#method.has_acpi">has_acpi</a><a href="#method.has_aesni">has_aesni</a><a href="#method.has_apic">has_apic</a><a href="#method.has_avx">has_avx</a><a href="#method.has_clflush">has_clflush</a><a href="#method.has_cmov">has_cmov</a><a href="#method.has_cmpxchg16b">has_cmpxchg16b</a><a href="#method.has_cmpxchg8b">has_cmpxchg8b</a><a href="#method.has_cnxtid">has_cnxtid</a><a href="#method.has_cpl">has_cpl</a><a href="#method.has_dca">has_dca</a><a href="#method.has_de">has_de</a><a href="#method.has_ds">has_ds</a><a href="#method.has_ds_area">has_ds_area</a><a href="#method.has_eist">has_eist</a><a href="#method.has_f16c">has_f16c</a><a href="#method.has_fma">has_fma</a><a href="#method.has_fpu">has_fpu</a><a href="#method.has_fxsave_fxstor">has_fxsave_fxstor</a><a href="#method.has_htt">has_htt</a><a href="#method.has_mca">has_mca</a><a href="#method.has_mce">has_mce</a><a href="#method.has_mmx">has_mmx</a><a href="#method.has_monitor_mwait">has_monitor_mwait</a><a href="#method.has_movbe">has_movbe</a><a href="#method.has_msr">has_msr</a><a href="#method.has_mtrr">has_mtrr</a><a href="#method.has_oxsave">has_oxsave</a><a href="#method.has_pae">has_pae</a><a href="#method.has_pat">has_pat</a><a href="#method.has_pbe">has_pbe</a><a href="#method.has_pcid">has_pcid</a><a href="#method.has_pclmulqdq">has_pclmulqdq</a><a href="#method.has_pdcm">has_pdcm</a><a href="#method.has_pge">has_pge</a><a href="#method.has_popcnt">has_popcnt</a><a href="#method.has_pse">has_pse</a><a href="#method.has_pse36">has_pse36</a><a href="#method.has_psn">has_psn</a><a href="#method.has_rdrand">has_rdrand</a><a href="#method.has_smx">has_smx</a><a href="#method.has_ss">has_ss</a><a href="#method.has_sse">has_sse</a><a href="#method.has_sse2">has_sse2</a><a href="#method.has_sse3">has_sse3</a><a href="#method.has_sse41">has_sse41</a><a href="#method.has_sse42">has_sse42</a><a href="#method.has_ssse3">has_ssse3</a><a href="#method.has_sysenter_sysexit">has_sysenter_sysexit</a><a href="#method.has_tm">has_tm</a><a href="#method.has_tm2">has_tm2</a><a href="#method.has_tsc">has_tsc</a><a href="#method.has_tsc_deadline">has_tsc_deadline</a><a href="#method.has_vme">has_vme</a><a href="#method.has_vmx">has_vmx</a><a href="#method.has_x2apic">has_x2apic</a><a href="#method.has_xsave">has_xsave</a><a href="#method.initial_local_apic_id">initial_local_apic_id</a><a href="#method.max_logical_processor_ids">max_logical_processor_ids</a><a href="#method.model_id">model_id</a><a href="#method.stepping_id">stepping_id</a></div><a class="sidebar-title" href="#implementations">Trait Implementations</a><div class="sidebar-links"><a href="#impl-Debug">Debug</a><a href="#impl-Default">Default</a></div><a class="sidebar-title" href="#synthetic-implementations">Auto Trait Implementations</a><div class="sidebar-links"><a href="#impl-Send">Send</a><a href="#impl-Sync">Sync</a><a href="#impl-Unpin">Unpin</a></div><a class="sidebar-title" href="#blanket-implementations">Blanket Implementations</a><div class="sidebar-links"><a href="#impl-Any">Any</a><a href="#impl-Borrow%3CT%3E">Borrow<T></a><a href="#impl-BorrowMut%3CT%3E">BorrowMut<T></a><a href="#impl-From%3CT%3E">From<T></a><a href="#impl-Into%3CU%3E">Into<U></a><a href="#impl-TryFrom%3CU%3E">TryFrom<U></a><a href="#impl-TryInto%3CU%3E">TryInto<U></a></div></div><p class='location'><a href='index.html'>raw_cpuid</a></p><script>window.sidebarCurrent = {name: 'FeatureInfo', ty: 'struct', relpath: ''};</script><script defer src="sidebar-items.js"></script></div></nav><div class="theme-picker"><button id="theme-picker" aria-label="Pick another theme!"><img src="../brush.svg" width="18" alt="Pick another theme!"></button><div id="theme-choices"></div></div><script src="../theme.js"></script><nav class="sub"><form class="search-form js-only"><div class="search-container"><div><select id="crate-search"><option value="All crates">All crates</option></select><input class="search-input" name="search" autocomplete="off" spellcheck="false" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"></div><a id="settings-menu" href="../settings.html"><img src="../wheel.svg" width="18" alt="Change settings"></a></div></form></nav><section id="main" class="content"><h1 class='fqn'><span class='out-of-band'><span id='render-detail'><a id="toggle-all-docs" href="javascript:void(0)" title="collapse all docs">[<span class='inner'>−</span>]</a></span><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1269-1273' title='goto source code'>[src]</a></span><span class='in-band'>Struct <a href='index.html'>raw_cpuid</a>::<wbr><a class="struct" href=''>FeatureInfo</a></span></h1><div class="docblock type-decl hidden-by-usual-hider"><pre class='rust struct'>pub struct FeatureInfo { /* fields omitted */ }</pre></div><h2 id='methods' class='small-section-header'>Methods<a href='#methods' class='anchor'></a></h2><h3 id='impl' class='impl'><code class='in-band'>impl <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl' class='anchor'></a><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1275-1811' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.extended_family_id' class="method"><code id='extended_family_id.v'>pub fn <a href='#method.extended_family_id' class='fnname'>extended_family_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1277-1279' title='goto source code'>[src]</a></h4><div class='docblock'><p>Version Information: Extended Family</p>
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</div><h4 id='method.extended_model_id' class="method"><code id='extended_model_id.v'>pub fn <a href='#method.extended_model_id' class='fnname'>extended_model_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1282-1284' title='goto source code'>[src]</a></h4><div class='docblock'><p>Version Information: Extended Model</p>
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</div><h4 id='method.family_id' class="method"><code id='family_id.v'>pub fn <a href='#method.family_id' class='fnname'>family_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1287-1289' title='goto source code'>[src]</a></h4><div class='docblock'><p>Version Information: Family</p>
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</div><h4 id='method.model_id' class="method"><code id='model_id.v'>pub fn <a href='#method.model_id' class='fnname'>model_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1292-1294' title='goto source code'>[src]</a></h4><div class='docblock'><p>Version Information: Model</p>
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</div><h4 id='method.stepping_id' class="method"><code id='stepping_id.v'>pub fn <a href='#method.stepping_id' class='fnname'>stepping_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1297-1299' title='goto source code'>[src]</a></h4><div class='docblock'><p>Version Information: Stepping ID</p>
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</div><h4 id='method.brand_index' class="method"><code id='brand_index.v'>pub fn <a href='#method.brand_index' class='fnname'>brand_index</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1302-1304' title='goto source code'>[src]</a></h4><div class='docblock'><p>Brand Index</p>
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</div><h4 id='method.cflush_cache_line_size' class="method"><code id='cflush_cache_line_size.v'>pub fn <a href='#method.cflush_cache_line_size' class='fnname'>cflush_cache_line_size</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1307-1309' title='goto source code'>[src]</a></h4><div class='docblock'><p>CLFLUSH line size (Value ∗ 8 = cache line size in bytes)</p>
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</div><h4 id='method.initial_local_apic_id' class="method"><code id='initial_local_apic_id.v'>pub fn <a href='#method.initial_local_apic_id' class='fnname'>initial_local_apic_id</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1312-1314' title='goto source code'>[src]</a></h4><div class='docblock'><p>Initial APIC ID</p>
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</div><h4 id='method.max_logical_processor_ids' class="method"><code id='max_logical_processor_ids.v'>pub fn <a href='#method.max_logical_processor_ids' class='fnname'>max_logical_processor_ids</a>(&self) -> u8</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1317-1319' title='goto source code'>[src]</a></h4><div class='docblock'><p>Maximum number of addressable IDs for logical processors in this physical package.</p>
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</div><h4 id='method.has_sse3' class="method"><code id='has_sse3.v'>pub fn <a href='#method.has_sse3' class='fnname'>has_sse3</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Streaming SIMD Extensions 3 (SSE3). A value of 1 indicates the processor supports this technology.</p>
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</div><h4 id='method.has_pclmulqdq' class="method"><code id='has_pclmulqdq.v'>pub fn <a href='#method.has_pclmulqdq' class='fnname'>has_pclmulqdq</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>PCLMULQDQ. A value of 1 indicates the processor supports the PCLMULQDQ instruction</p>
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</div><h4 id='method.has_ds_area' class="method"><code id='has_ds_area.v'>pub fn <a href='#method.has_ds_area' class='fnname'>has_ds_area</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>64-bit DS Area. A value of 1 indicates the processor supports DS area using 64-bit layout</p>
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</div><h4 id='method.has_monitor_mwait' class="method"><code id='has_monitor_mwait.v'>pub fn <a href='#method.has_monitor_mwait' class='fnname'>has_monitor_mwait</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>MONITOR/MWAIT. A value of 1 indicates the processor supports this feature.</p>
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</div><h4 id='method.has_cpl' class="method"><code id='has_cpl.v'>pub fn <a href='#method.has_cpl' class='fnname'>has_cpl</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>CPL Qualified Debug Store. A value of 1 indicates the processor supports the extensions to the Debug Store feature to allow for branch message storage qualified by CPL.</p>
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</div><h4 id='method.has_vmx' class="method"><code id='has_vmx.v'>pub fn <a href='#method.has_vmx' class='fnname'>has_vmx</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Virtual Machine Extensions. A value of 1 indicates that the processor supports this technology.</p>
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</div><h4 id='method.has_smx' class="method"><code id='has_smx.v'>pub fn <a href='#method.has_smx' class='fnname'>has_smx</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Safer Mode Extensions. A value of 1 indicates that the processor supports this technology. See Chapter 5, Safer Mode Extensions Reference.</p>
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</div><h4 id='method.has_eist' class="method"><code id='has_eist.v'>pub fn <a href='#method.has_eist' class='fnname'>has_eist</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Enhanced Intel SpeedStep® technology. A value of 1 indicates that the processor supports this technology.</p>
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</div><h4 id='method.has_tm2' class="method"><code id='has_tm2.v'>pub fn <a href='#method.has_tm2' class='fnname'>has_tm2</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Thermal Monitor 2. A value of 1 indicates whether the processor supports this technology.</p>
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</div><h4 id='method.has_ssse3' class="method"><code id='has_ssse3.v'>pub fn <a href='#method.has_ssse3' class='fnname'>has_ssse3</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates the presence of the Supplemental Streaming SIMD Extensions 3 (SSSE3). A value of 0 indicates the instruction extensions are not present in the processor</p>
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</div><h4 id='method.has_cnxtid' class="method"><code id='has_cnxtid.v'>pub fn <a href='#method.has_cnxtid' class='fnname'>has_cnxtid</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>L1 Context ID. A value of 1 indicates the L1 data cache mode can be set to either adaptive mode or shared mode. A value of 0 indicates this feature is not supported. See definition of the IA32_MISC_ENABLE MSR Bit 24 (L1 Data Cache Context Mode) for details.</p>
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</div><h4 id='method.has_fma' class="method"><code id='has_fma.v'>pub fn <a href='#method.has_fma' class='fnname'>has_fma</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates the processor supports FMA extensions using YMM state.</p>
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</div><h4 id='method.has_cmpxchg16b' class="method"><code id='has_cmpxchg16b.v'>pub fn <a href='#method.has_cmpxchg16b' class='fnname'>has_cmpxchg16b</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>CMPXCHG16B Available. A value of 1 indicates that the feature is available. See the CMPXCHG8B/CMPXCHG16B Compare and Exchange Bytes section. 14</p>
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</div><h4 id='method.has_pdcm' class="method"><code id='has_pdcm.v'>pub fn <a href='#method.has_pdcm' class='fnname'>has_pdcm</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Perfmon and Debug Capability: A value of 1 indicates the processor supports the performance and debug feature indication MSR IA32_PERF_CAPABILITIES.</p>
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</div><h4 id='method.has_pcid' class="method"><code id='has_pcid.v'>pub fn <a href='#method.has_pcid' class='fnname'>has_pcid</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Process-context identifiers. A value of 1 indicates that the processor supports PCIDs and the software may set CR4.PCIDE to 1.</p>
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</div><h4 id='method.has_dca' class="method"><code id='has_dca.v'>pub fn <a href='#method.has_dca' class='fnname'>has_dca</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates the processor supports the ability to prefetch data from a memory mapped device.</p>
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</div><h4 id='method.has_sse41' class="method"><code id='has_sse41.v'>pub fn <a href='#method.has_sse41' class='fnname'>has_sse41</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports SSE4.1.</p>
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</div><h4 id='method.has_sse42' class="method"><code id='has_sse42.v'>pub fn <a href='#method.has_sse42' class='fnname'>has_sse42</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports SSE4.2.</p>
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</div><h4 id='method.has_x2apic' class="method"><code id='has_x2apic.v'>pub fn <a href='#method.has_x2apic' class='fnname'>has_x2apic</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports x2APIC feature.</p>
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</div><h4 id='method.has_movbe' class="method"><code id='has_movbe.v'>pub fn <a href='#method.has_movbe' class='fnname'>has_movbe</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports MOVBE instruction.</p>
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</div><h4 id='method.has_popcnt' class="method"><code id='has_popcnt.v'>pub fn <a href='#method.has_popcnt' class='fnname'>has_popcnt</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports the POPCNT instruction.</p>
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</div><h4 id='method.has_tsc_deadline' class="method"><code id='has_tsc_deadline.v'>pub fn <a href='#method.has_tsc_deadline' class='fnname'>has_tsc_deadline</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processors local APIC timer supports one-shot operation using a TSC deadline value.</p>
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</div><h4 id='method.has_aesni' class="method"><code id='has_aesni.v'>pub fn <a href='#method.has_aesni' class='fnname'>has_aesni</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports the AESNI instruction extensions.</p>
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</div><h4 id='method.has_xsave' class="method"><code id='has_xsave.v'>pub fn <a href='#method.has_xsave' class='fnname'>has_xsave</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the processor supports the XSAVE/XRSTOR processor extended states feature, the XSETBV/XGETBV instructions, and XCR0.</p>
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</div><h4 id='method.has_oxsave' class="method"><code id='has_oxsave.v'>pub fn <a href='#method.has_oxsave' class='fnname'>has_oxsave</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that the OS has enabled XSETBV/XGETBV instructions to access XCR0, and support for processor extended state management using XSAVE/XRSTOR.</p>
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</div><h4 id='method.has_avx' class="method"><code id='has_avx.v'>pub fn <a href='#method.has_avx' class='fnname'>has_avx</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates the processor supports the AVX instruction extensions.</p>
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</div><h4 id='method.has_f16c' class="method"><code id='has_f16c.v'>pub fn <a href='#method.has_f16c' class='fnname'>has_f16c</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that processor supports 16-bit floating-point conversion instructions.</p>
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</div><h4 id='method.has_rdrand' class="method"><code id='has_rdrand.v'>pub fn <a href='#method.has_rdrand' class='fnname'>has_rdrand</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>A value of 1 indicates that processor supports RDRAND instruction.</p>
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</div><h4 id='method.has_fpu' class="method"><code id='has_fpu.v'>pub fn <a href='#method.has_fpu' class='fnname'>has_fpu</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Floating Point Unit On-Chip. The processor contains an x87 FPU.</p>
|
||
</div><h4 id='method.has_vme' class="method"><code id='has_vme.v'>pub fn <a href='#method.has_vme' class='fnname'>has_vme</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Virtual 8086 Mode Enhancements. Virtual 8086 mode enhancements, including CR4.VME for controlling the feature, CR4.PVI for protected mode virtual interrupts, software interrupt indirection, expansion of the TSS with the software indirection bitmap, and EFLAGS.VIF and EFLAGS.VIP flags.</p>
|
||
</div><h4 id='method.has_de' class="method"><code id='has_de.v'>pub fn <a href='#method.has_de' class='fnname'>has_de</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Debugging Extensions. Support for I/O breakpoints, including CR4.DE for controlling the feature, and optional trapping of accesses to DR4 and DR5.</p>
|
||
</div><h4 id='method.has_pse' class="method"><code id='has_pse.v'>pub fn <a href='#method.has_pse' class='fnname'>has_pse</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Page Size Extension. Large pages of size 4 MByte are supported, including CR4.PSE for controlling the feature, the defined dirty bit in PDE (Page Directory Entries), optional reserved bit trapping in CR3, PDEs, and PTEs.</p>
|
||
</div><h4 id='method.has_tsc' class="method"><code id='has_tsc.v'>pub fn <a href='#method.has_tsc' class='fnname'>has_tsc</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Time Stamp Counter. The RDTSC instruction is supported, including CR4.TSD for controlling privilege.</p>
|
||
</div><h4 id='method.has_msr' class="method"><code id='has_msr.v'>pub fn <a href='#method.has_msr' class='fnname'>has_msr</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Model Specific Registers RDMSR and WRMSR Instructions. The RDMSR and WRMSR instructions are supported. Some of the MSRs are implementation dependent.</p>
|
||
</div><h4 id='method.has_pae' class="method"><code id='has_pae.v'>pub fn <a href='#method.has_pae' class='fnname'>has_pae</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Physical Address Extension. Physical addresses greater than 32 bits are supported: extended page table entry formats, an extra level in the page translation tables is defined, 2-MByte pages are supported instead of 4 Mbyte pages if PAE bit is 1.</p>
|
||
</div><h4 id='method.has_mce' class="method"><code id='has_mce.v'>pub fn <a href='#method.has_mce' class='fnname'>has_mce</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Machine Check Exception. Exception 18 is defined for Machine Checks, including CR4.MCE for controlling the feature. This feature does not define the model-specific implementations of machine-check error logging, reporting, and processor shutdowns. Machine Check exception handlers may have to depend on processor version to do model specific processing of the exception, or test for the presence of the Machine Check feature.</p>
|
||
</div><h4 id='method.has_cmpxchg8b' class="method"><code id='has_cmpxchg8b.v'>pub fn <a href='#method.has_cmpxchg8b' class='fnname'>has_cmpxchg8b</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>CMPXCHG8B Instruction. The compare-and-exchange 8 bytes (64 bits) instruction is supported (implicitly locked and atomic).</p>
|
||
</div><h4 id='method.has_apic' class="method"><code id='has_apic.v'>pub fn <a href='#method.has_apic' class='fnname'>has_apic</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>APIC On-Chip. The processor contains an Advanced Programmable Interrupt Controller (APIC), responding to memory mapped commands in the physical address range FFFE0000H to FFFE0FFFH (by default - some processors permit the APIC to be relocated).</p>
|
||
</div><h4 id='method.has_sysenter_sysexit' class="method"><code id='has_sysenter_sysexit.v'>pub fn <a href='#method.has_sysenter_sysexit' class='fnname'>has_sysenter_sysexit</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>SYSENTER and SYSEXIT Instructions. The SYSENTER and SYSEXIT and associated MSRs are supported.</p>
|
||
</div><h4 id='method.has_mtrr' class="method"><code id='has_mtrr.v'>pub fn <a href='#method.has_mtrr' class='fnname'>has_mtrr</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Memory Type Range Registers. MTRRs are supported. The MTRRcap MSR contains feature bits that describe what memory types are supported, how many variable MTRRs are supported, and whether fixed MTRRs are supported.</p>
|
||
</div><h4 id='method.has_pge' class="method"><code id='has_pge.v'>pub fn <a href='#method.has_pge' class='fnname'>has_pge</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Page Global Bit. The global bit is supported in paging-structure entries that map a page, indicating TLB entries that are common to different processes and need not be flushed. The CR4.PGE bit controls this feature.</p>
|
||
</div><h4 id='method.has_mca' class="method"><code id='has_mca.v'>pub fn <a href='#method.has_mca' class='fnname'>has_mca</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Machine Check Architecture. A value of 1 indicates the Machine Check Architecture of reporting machine errors is supported. The MCG_CAP MSR contains feature bits describing how many banks of error reporting MSRs are supported.</p>
|
||
</div><h4 id='method.has_cmov' class="method"><code id='has_cmov.v'>pub fn <a href='#method.has_cmov' class='fnname'>has_cmov</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Conditional Move Instructions. The conditional move instruction CMOV is supported. In addition, if x87 FPU is present as indicated by the CPUID.FPU feature bit, then the FCOMI and FCMOV instructions are supported</p>
|
||
</div><h4 id='method.has_pat' class="method"><code id='has_pat.v'>pub fn <a href='#method.has_pat' class='fnname'>has_pat</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Page Attribute Table. Page Attribute Table is supported. This feature augments the Memory Type Range Registers (MTRRs), allowing an operating system to specify attributes of memory accessed through a linear address on a 4KB granularity.</p>
|
||
</div><h4 id='method.has_pse36' class="method"><code id='has_pse36.v'>pub fn <a href='#method.has_pse36' class='fnname'>has_pse36</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>36-Bit Page Size Extension. 4-MByte pages addressing physical memory beyond 4 GBytes are supported with 32-bit paging. This feature indicates that upper bits of the physical address of a 4-MByte page are encoded in bits 20:13 of the page-directory entry. Such physical addresses are limited by MAXPHYADDR and may be up to 40 bits in size.</p>
|
||
</div><h4 id='method.has_psn' class="method"><code id='has_psn.v'>pub fn <a href='#method.has_psn' class='fnname'>has_psn</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Processor Serial Number. The processor supports the 96-bit processor identification number feature and the feature is enabled.</p>
|
||
</div><h4 id='method.has_clflush' class="method"><code id='has_clflush.v'>pub fn <a href='#method.has_clflush' class='fnname'>has_clflush</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>CLFLUSH Instruction. CLFLUSH Instruction is supported.</p>
|
||
</div><h4 id='method.has_ds' class="method"><code id='has_ds.v'>pub fn <a href='#method.has_ds' class='fnname'>has_ds</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Debug Store. The processor supports the ability to write debug information into a memory resident buffer. This feature is used by the branch trace store (BTS) and processor event-based sampling (PEBS) facilities (see Chapter 23, Introduction to Virtual-Machine Extensions, in the Intel® 64 and IA-32 Architectures Software Developers Manual, Volume 3C).</p>
|
||
</div><h4 id='method.has_acpi' class="method"><code id='has_acpi.v'>pub fn <a href='#method.has_acpi' class='fnname'>has_acpi</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Thermal Monitor and Software Controlled Clock Facilities. The processor implements internal MSRs that allow processor temperature to be monitored and processor performance to be modulated in predefined duty cycles under software control.</p>
|
||
</div><h4 id='method.has_mmx' class="method"><code id='has_mmx.v'>pub fn <a href='#method.has_mmx' class='fnname'>has_mmx</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Intel MMX Technology. The processor supports the Intel MMX technology.</p>
|
||
</div><h4 id='method.has_fxsave_fxstor' class="method"><code id='has_fxsave_fxstor.v'>pub fn <a href='#method.has_fxsave_fxstor' class='fnname'>has_fxsave_fxstor</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>FXSAVE and FXRSTOR Instructions. The FXSAVE and FXRSTOR instructions are supported for fast save and restore of the floating point context. Presence of this bit also indicates that CR4.OSFXSR is available for an operating system to indicate that it supports the FXSAVE and FXRSTOR instructions.</p>
|
||
</div><h4 id='method.has_sse' class="method"><code id='has_sse.v'>pub fn <a href='#method.has_sse' class='fnname'>has_sse</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>SSE. The processor supports the SSE extensions.</p>
|
||
</div><h4 id='method.has_sse2' class="method"><code id='has_sse2.v'>pub fn <a href='#method.has_sse2' class='fnname'>has_sse2</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>SSE2. The processor supports the SSE2 extensions.</p>
|
||
</div><h4 id='method.has_ss' class="method"><code id='has_ss.v'>pub fn <a href='#method.has_ss' class='fnname'>has_ss</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Self Snoop. The processor supports the management of conflicting memory types by performing a snoop of its own cache structure for transactions issued to the bus.</p>
|
||
</div><h4 id='method.has_htt' class="method"><code id='has_htt.v'>pub fn <a href='#method.has_htt' class='fnname'>has_htt</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Max APIC IDs reserved field is Valid. A value of 0 for HTT indicates there is only a single logical processor in the package and software should assume only a single APIC ID is reserved. A value of 1 for HTT indicates the value in CPUID.1.EBX[23:16] (the Maximum number of addressable IDs for logical processors in this package) is valid for the package.</p>
|
||
</div><h4 id='method.has_tm' class="method"><code id='has_tm.v'>pub fn <a href='#method.has_tm' class='fnname'>has_tm</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Thermal Monitor. The processor implements the thermal monitor automatic thermal control circuitry (TCC).</p>
|
||
</div><h4 id='method.has_pbe' class="method"><code id='has_pbe.v'>pub fn <a href='#method.has_pbe' class='fnname'>has_pbe</a>(&self) -> bool</code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#109-111' title='goto source code'>[src]</a></h4><div class='docblock'><p>Pending Break Enable. The processor supports the use of the FERR#/PBE# pin when the processor is in the stop-clock state (STPCLK# is asserted) to signal the processor that an interrupt is pending and that the processor should return to normal operation to handle the interrupt. Bit 10 (PBE enable) in the IA32_MISC_ENABLE MSR enables this capability.</p>
|
||
</div></div><h2 id='implementations' class='small-section-header'>Trait Implementations<a href='#implementations' class='anchor'></a></h2><div id='implementations-list'><h3 id='impl-Debug' class='impl'><code class='in-band'>impl <a class="trait" href="https://doc.rust-lang.org/nightly/core/fmt/trait.Debug.html" title="trait core::fmt::Debug">Debug</a> for <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl-Debug' class='anchor'></a><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1267' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.fmt' class="method hidden"><code id='fmt.v'>fn <a href='https://doc.rust-lang.org/nightly/core/fmt/trait.Debug.html#tymethod.fmt' class='fnname'>fmt</a>(&self, f: &mut <a class="struct" href="https://doc.rust-lang.org/nightly/core/fmt/struct.Formatter.html" title="struct core::fmt::Formatter">Formatter</a>) -> <a class="type" href="https://doc.rust-lang.org/nightly/core/fmt/type.Result.html" title="type core::fmt::Result">Result</a></code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1267' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Formats the value using the given formatter. <a href="https://doc.rust-lang.org/nightly/core/fmt/trait.Debug.html#tymethod.fmt">Read more</a></p>
|
||
</div></div><h3 id='impl-Default' class='impl'><code class='in-band'>impl <a class="trait" href="https://doc.rust-lang.org/nightly/core/default/trait.Default.html" title="trait core::default::Default">Default</a> for <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl-Default' class='anchor'></a><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1267' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.default' class="method hidden"><code id='default.v'>fn <a href='https://doc.rust-lang.org/nightly/core/default/trait.Default.html#tymethod.default' class='fnname'>default</a>() -> <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a class='srclink' href='../src/raw_cpuid/lib.rs.html#1267' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Returns the "default value" for a type. <a href="https://doc.rust-lang.org/nightly/core/default/trait.Default.html#tymethod.default">Read more</a></p>
|
||
</div></div></div><h2 id='synthetic-implementations' class='small-section-header'>Auto Trait Implementations<a href='#synthetic-implementations' class='anchor'></a></h2><div id='synthetic-implementations-list'><h3 id='impl-Send' class='impl'><code class='in-band'>impl <a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Send.html" title="trait core::marker::Send">Send</a> for <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl-Send' class='anchor'></a></h3><div class='impl-items'></div><h3 id='impl-Sync' class='impl'><code class='in-band'>impl <a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Sync.html" title="trait core::marker::Sync">Sync</a> for <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl-Sync' class='anchor'></a></h3><div class='impl-items'></div><h3 id='impl-Unpin' class='impl'><code class='in-band'>impl <a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Unpin.html" title="trait core::marker::Unpin">Unpin</a> for <a class="struct" href="../raw_cpuid/struct.FeatureInfo.html" title="struct raw_cpuid::FeatureInfo">FeatureInfo</a></code><a href='#impl-Unpin' class='anchor'></a></h3><div class='impl-items'></div></div><h2 id='blanket-implementations' class='small-section-header'>Blanket Implementations<a href='#blanket-implementations' class='anchor'></a></h2><div id='blanket-implementations-list'><h3 id='impl-From%3CT%3E' class='impl'><code class='in-band'>impl<T> <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.From.html" title="trait core::convert::From">From</a><T> for T</code><a href='#impl-From%3CT%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#552-554' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.from' class="method hidden"><code id='from.v'>fn <a href='https://doc.rust-lang.org/nightly/core/convert/trait.From.html#tymethod.from' class='fnname'>from</a>(t: T) -> T</code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#553' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Performs the conversion.</p>
|
||
</div></div><h3 id='impl-TryFrom%3CU%3E' class='impl'><code class='in-band'>impl<T, U> <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html" title="trait core::convert::TryFrom">TryFrom</a><U> for T <span class="where fmt-newline">where<br> U: <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.Into.html" title="trait core::convert::Into">Into</a><T>, </span></code><a href='#impl-TryFrom%3CU%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#571-577' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='associatedtype.Error' class="type"><code id='Error.t'>type <a href='https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html#associatedtype.Error' class="type">Error</a> = <a class="enum" href="https://doc.rust-lang.org/nightly/core/convert/enum.Infallible.html" title="enum core::convert::Infallible">Infallible</a></code></h4><div class='docblock'><p>The type returned in the event of a conversion error.</p>
|
||
</div><h4 id='method.try_from' class="method hidden"><code id='try_from.v'>fn <a href='https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html#tymethod.try_from' class='fnname'>try_from</a>(value: U) -> <a class="enum" href="https://doc.rust-lang.org/nightly/core/result/enum.Result.html" title="enum core::result::Result">Result</a><T, <T as <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html" title="trait core::convert::TryFrom">TryFrom</a><U>>::<a class="type" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html#associatedtype.Error" title="type core::convert::TryFrom::Error">Error</a>></code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#574-576' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Performs the conversion.</p>
|
||
</div></div><h3 id='impl-Into%3CU%3E' class='impl'><code class='in-band'>impl<T, U> <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.Into.html" title="trait core::convert::Into">Into</a><U> for T <span class="where fmt-newline">where<br> U: <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.From.html" title="trait core::convert::From">From</a><T>, </span></code><a href='#impl-Into%3CU%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#543-548' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.into' class="method hidden"><code id='into.v'>fn <a href='https://doc.rust-lang.org/nightly/core/convert/trait.Into.html#tymethod.into' class='fnname'>into</a>(self) -> U</code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#545-547' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Performs the conversion.</p>
|
||
</div></div><h3 id='impl-TryInto%3CU%3E' class='impl'><code class='in-band'>impl<T, U> <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryInto.html" title="trait core::convert::TryInto">TryInto</a><U> for T <span class="where fmt-newline">where<br> U: <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html" title="trait core::convert::TryFrom">TryFrom</a><T>, </span></code><a href='#impl-TryInto%3CU%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#559-566' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='associatedtype.Error-1' class="type"><code id='Error.t-1'>type <a href='https://doc.rust-lang.org/nightly/core/convert/trait.TryInto.html#associatedtype.Error' class="type">Error</a> = <U as <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html" title="trait core::convert::TryFrom">TryFrom</a><T>>::<a class="type" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html#associatedtype.Error" title="type core::convert::TryFrom::Error">Error</a></code></h4><div class='docblock'><p>The type returned in the event of a conversion error.</p>
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</div><h4 id='method.try_into' class="method hidden"><code id='try_into.v'>fn <a href='https://doc.rust-lang.org/nightly/core/convert/trait.TryInto.html#tymethod.try_into' class='fnname'>try_into</a>(self) -> <a class="enum" href="https://doc.rust-lang.org/nightly/core/result/enum.Result.html" title="enum core::result::Result">Result</a><U, <U as <a class="trait" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html" title="trait core::convert::TryFrom">TryFrom</a><T>>::<a class="type" href="https://doc.rust-lang.org/nightly/core/convert/trait.TryFrom.html#associatedtype.Error" title="type core::convert::TryFrom::Error">Error</a>></code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/convert.rs.html#563-565' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Performs the conversion.</p>
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</div></div><h3 id='impl-Borrow%3CT%3E' class='impl'><code class='in-band'>impl<T> <a class="trait" href="https://doc.rust-lang.org/nightly/core/borrow/trait.Borrow.html" title="trait core::borrow::Borrow">Borrow</a><T> for T <span class="where fmt-newline">where<br> T: ?<a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Sized.html" title="trait core::marker::Sized">Sized</a>, </span></code><a href='#impl-Borrow%3CT%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/borrow.rs.html#213-215' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.borrow' class="method hidden"><code id='borrow.v'>fn <a href='https://doc.rust-lang.org/nightly/core/borrow/trait.Borrow.html#tymethod.borrow' class='fnname'>borrow</a>(&self) -> &T</code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/borrow.rs.html#214' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Immutably borrows from an owned value. <a href="https://doc.rust-lang.org/nightly/core/borrow/trait.Borrow.html#tymethod.borrow">Read more</a></p>
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</div></div><h3 id='impl-BorrowMut%3CT%3E' class='impl'><code class='in-band'>impl<T> <a class="trait" href="https://doc.rust-lang.org/nightly/core/borrow/trait.BorrowMut.html" title="trait core::borrow::BorrowMut">BorrowMut</a><T> for T <span class="where fmt-newline">where<br> T: ?<a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Sized.html" title="trait core::marker::Sized">Sized</a>, </span></code><a href='#impl-BorrowMut%3CT%3E' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/borrow.rs.html#218-220' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.borrow_mut' class="method hidden"><code id='borrow_mut.v'>fn <a href='https://doc.rust-lang.org/nightly/core/borrow/trait.BorrowMut.html#tymethod.borrow_mut' class='fnname'>borrow_mut</a>(&mut self) -> &mut T</code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/borrow.rs.html#219' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Mutably borrows from an owned value. <a href="https://doc.rust-lang.org/nightly/core/borrow/trait.BorrowMut.html#tymethod.borrow_mut">Read more</a></p>
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</div></div><h3 id='impl-Any' class='impl'><code class='in-band'>impl<T> <a class="trait" href="https://doc.rust-lang.org/nightly/core/any/trait.Any.html" title="trait core::any::Any">Any</a> for T <span class="where fmt-newline">where<br> T: 'static + ?<a class="trait" href="https://doc.rust-lang.org/nightly/core/marker/trait.Sized.html" title="trait core::marker::Sized">Sized</a>, </span></code><a href='#impl-Any' class='anchor'></a><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/any.rs.html#100-102' title='goto source code'>[src]</a></h3><div class='impl-items'><h4 id='method.type_id' class="method hidden"><code id='type_id.v'>fn <a href='https://doc.rust-lang.org/nightly/core/any/trait.Any.html#tymethod.type_id' class='fnname'>type_id</a>(&self) -> <a class="struct" href="https://doc.rust-lang.org/nightly/core/any/struct.TypeId.html" title="struct core::any::TypeId">TypeId</a></code><a class='srclink' href='https://doc.rust-lang.org/nightly/src/core/any.rs.html#101' title='goto source code'>[src]</a></h4><div class='docblock hidden'><p>Gets the <code>TypeId</code> of <code>self</code>. <a href="https://doc.rust-lang.org/nightly/core/any/trait.Any.html#tymethod.type_id">Read more</a></p>
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