156 Commits

Author SHA1 Message Date
Nick Lewycky
cf3d2a830d Reimplement I32Clz without relying on LZCNT. 2019-10-15 12:50:59 -07:00
Nick Lewycky
26a4f073f0 Implement F64Min and F64Max. 2019-10-14 14:15:18 -07:00
Nick Lewycky
06ffb00deb Reimplement F32Max. 2019-10-14 14:07:30 -07:00
Nick Lewycky
b886a41a85 Use temp_gprs instead of hard-coding RAX/RDX. 2019-10-14 13:53:30 -07:00
Nick Lewycky
5cee23455d Release the registers we acquire. Reformat. 2019-10-14 13:51:03 -07:00
Nick Lewycky
336dab7fd9 Don't use utility functions in F32Min implementation. 2019-10-14 13:46:55 -07:00
Nick Lewycky
4b89e01806 Remove commented-out code that I added so as to not lose its history in git. Apply trivial cleanups and reformat.
Remove expected test failure entries that are fixed so far.
2019-10-14 13:46:55 -07:00
Nick Lewycky
963148fdce Fix F32Min for all cases including NaNs. 2019-10-14 13:46:55 -07:00
Nick Lewycky
8b937afc1f Add comments to indicate the implemention we'd like to have, but can't right now. 2019-10-14 13:46:55 -07:00
Nick Lewycky
0f712c90ab Don't allocate another register when it's safe to reuse dst. 2019-10-14 13:46:55 -07:00
Nick Lewycky
b75e5c0c7c When we know RDX is unavailable, use RAX instead. Should be fine here. 2019-10-14 13:46:55 -07:00
Nick Lewycky
d6eba03a2f Remove loc1/loc2. That intended refactoring didn't work out. 2019-10-14 13:46:55 -07:00
Nick Lewycky
555d933057 Initial commit, reimplementation of F32Min. Fixes F32Min(negative_zero, zero) issue.
Also removes some previously-fixed i32 and i64 exclusions from the tests.
2019-10-14 13:46:55 -07:00
losfair
a525907c60 Emit state information for internal breakpoints. 2019-10-14 20:23:10 +08:00
losfair
36f95fc660 Support emitting inline breakpoints in singlepass. 2019-10-11 21:05:42 +08:00
Nick Lewycky
ab76c2357f Delete dead (commented out) code. NFC. 2019-10-02 16:31:11 -07:00
Nick Lewycky
83b678bc36 Give this function a better name. 2019-10-02 16:31:11 -07:00
Nick Lewycky
ba68cfc2c6 Finish atomic operations for singlepass, excluding wait and notify. 2019-10-02 16:31:11 -07:00
Nick Lewycky
bc7e017188 Add atomic.rmw operations, excluding xchg and cmpxchg.
Sizes are now ordered, to facilitate an assertion that one size is less (smaller) than another.

panic! error messages are provided for remaining emitter functions.
2019-10-02 16:31:11 -07:00
Nick Lewycky
f021d59a0b Refactor out a compare-and-swap loop function. 2019-10-02 16:31:11 -07:00
Nick Lewycky
cd1d06f5a5 Initial working implementation of I32AtomicRmwAnd!
Adds the ability to reserve a specific temp-gpr register. Needed for CMPXCHG which always uses RAX.
2019-10-02 16:31:11 -07:00
Nick Lewycky
6937019b65 Use a compare-and-swap loop for AND.
BUG: This might allocate RAX twice.
2019-10-02 16:31:10 -07:00
Nick Lewycky
efc89e829d Add i32 rmw add and sub. 2019-10-02 16:31:10 -07:00
Nick Lewycky
98f35ef84a Initial implementation of atomic load/store and i32 atomic rmw add. 2019-10-02 16:31:10 -07:00
losfair
89d8b5a41c Fixes for aarch64. 2019-09-28 17:31:10 +08:00
Nick Lewycky
be181f9119 Correct this test and simplify. 2019-09-24 10:54:23 -07:00
Nick Lewycky
07b5991080 No need to emit add of constant zero. 2019-09-23 15:01:19 -07:00
losfair
a124d87d0f Fix Operator::MemorySize. 2019-09-19 01:10:23 +08:00
losfair
72b6123def Fix memory grow 2019-09-18 02:38:35 +08:00
losfair
b57aba4ae7 Add homomorphic host redirection abstraction for vm->host calls. 2019-09-18 02:14:13 +08:00
Patrick Ventuzelo
00c2e09f43 fix CodeGen message type 2019-09-16 11:00:03 +02:00
Patrick Ventuzelo
33ba6768bc replace panics by CodeGen Error in codegen_x64 2019-09-16 09:56:41 +02:00
losfair
d3227f830c More instructions & aarch64 trampolines. 2019-09-15 17:57:40 +08:00
Syrus
d8471e2b6a Improved docs with custom logo and favicon 2019-09-03 17:06:31 -07:00
losfair
bf9d915635 Fix a few issues from PR comments. 2019-08-21 14:53:33 -07:00
losfair
124ad73e8a Merge remote-tracking branch 'origin/master' into feature/llvm-osr 2019-08-19 13:06:59 -07:00
losfair
afa0600701 Cargo fmt 2019-08-15 19:13:00 -07:00
losfair
6a24485999 Insert trampolines to preserve callee-saved registers for backends without register save area information. 2019-08-15 19:10:24 -07:00
Brandon Fish
98d3e04137 Fix unused mut warning 2019-08-15 20:09:51 -06:00
Brandon Fish
439e81d41e Fix singlepass error when no function code present 2019-08-15 10:15:58 -06:00
losfair
98ef9182d7 Run clang-format and cargo fmt 2019-08-14 16:35:40 -07:00
losfair
0e0573c73c Merge remote-tracking branch 'origin/master' into feature/llvm-osr 2019-08-14 16:33:26 -07:00
losfair
9cade2b441 singlepass: Skip patchpoint. 2019-08-10 03:10:32 +08:00
Brandon Fish
5a41686192 Fix bare_trait_objects warnings 2019-08-08 16:46:52 -06:00
losfair
c1619026d5 Swap code lazily when tiering up from singlepass to LLVM.
Does not handle long-running functions, but should work at least.
2019-08-09 04:26:17 +08:00
losfair
283676af2b Add .clone() to fix singlepass. 2019-07-30 22:25:37 +08:00
Nick Lewycky
eeac6d5d2d Merge branch 'master' of github.com:wasmerio/wasmer into simd 2019-07-16 19:16:45 -07:00
Brandon Fish
ed19fd2913 Update loader-kernel feature name, fix compilation track state, cargo fmt 2019-07-12 23:02:57 -05:00
losfair
450109e2bb Fix singlepass compilation error. 2019-07-13 00:17:21 +08:00
losfair
08cdc9a42f Allow disabling state tracking for faster startup. 2019-07-12 23:37:40 +08:00