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Add support for non-trapping float to int conversions in singlepass+AArch64.

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This commit is contained in:
Nick Lewycky
2019-12-16 15:15:49 -08:00
parent 32ed6f2c10
commit b7929e6561
1 changed files with 86 additions and 54 deletions
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32
lib/singlepass-backend/src/codegen_x64.rs
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@ -4763,7 +4763,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
},
None::<fn(_a: &mut Assembler, _m: &mut Machine)>,
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i32_trunc_uf32(tmp_in, tmp_out);
} else {
a.emit_cvttss2si_64(XMMOrMemory::XMM(tmp_in), tmp_out);
}
},
);
@ -4876,7 +4880,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
a.emit_mov(Size::S32, Location::Imm32(0), Location::GPR(tmp_out));
}),
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i32_trunc_sf32(tmp_in, tmp_out);
} else {
a.emit_cvttss2si_32(XMMOrMemory::XMM(tmp_in), tmp_out);
}
},
);
@ -4989,7 +4997,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
a.emit_mov(Size::S64, Location::Imm64(0), Location::GPR(tmp_out));
}),
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i64_trunc_sf32(tmp_in, tmp_out);
} else {
a.emit_cvttss2si_64(XMMOrMemory::XMM(tmp_in), tmp_out);
}
},
);
@ -5120,6 +5132,9 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
},
None::<fn(_a: &mut Assembler, _m: &mut Machine)>,
|a, m| {
if a.arch_has_itruncf() {
a.arch_emit_i64_trunc_uf32(tmp_in, tmp_out);
} else {
let tmp = m.acquire_temp_gpr().unwrap(); // r15
let tmp_x1 = m.acquire_temp_xmm().unwrap(); // xmm1
let tmp_x2 = m.acquire_temp_xmm().unwrap(); // xmm3
@ -5146,6 +5161,7 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
m.release_temp_xmm(tmp_x2);
m.release_temp_xmm(tmp_x1);
m.release_temp_gpr(tmp);
}
},
);
@ -5253,7 +5269,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
},
None::<fn(_a: &mut Assembler, _m: &mut Machine)>,
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i32_trunc_uf64(tmp_in, tmp_out);
} else {
a.emit_cvttsd2si_64(XMMOrMemory::XMM(tmp_in), tmp_out);
}
},
);
@ -5377,7 +5397,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
a.emit_mov(Size::S32, Location::Imm32(0), Location::GPR(tmp_out));
}),
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i32_trunc_sf64(tmp_in, tmp_out);
} else {
a.emit_cvttsd2si_32(XMMOrMemory::XMM(real_in), tmp_out);
}
},
);
@ -5491,7 +5515,11 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
a.emit_mov(Size::S64, Location::Imm64(0), Location::GPR(tmp_out));
}),
|a, _m| {
if a.arch_has_itruncf() {
a.arch_emit_i64_trunc_sf64(tmp_in, tmp_out);
} else {
a.emit_cvttsd2si_64(XMMOrMemory::XMM(tmp_in), tmp_out);
}
},
);
@ -5623,6 +5651,9 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
},
None::<fn(_a: &mut Assembler, _m: &mut Machine)>,
|a, m| {
if a.arch_has_itruncf() {
a.arch_emit_i64_trunc_uf64(tmp_in, tmp_out);
} else {
let tmp = m.acquire_temp_gpr().unwrap(); // r15
let tmp_x1 = m.acquire_temp_xmm().unwrap(); // xmm1
let tmp_x2 = m.acquire_temp_xmm().unwrap(); // xmm3
@ -5649,6 +5680,7 @@ impl FunctionCodeGenerator<CodegenError> for X64FunctionCode {
m.release_temp_xmm(tmp_x2);
m.release_temp_xmm(tmp_x1);
m.release_temp_gpr(tmp);
}
},
);