Relax constraints a bit to compile on aarch64.

This commit is contained in:
losfair
2019-09-15 18:23:42 +08:00
parent d3227f830c
commit 9b77677e4b
4 changed files with 110 additions and 84 deletions

View File

@ -398,8 +398,91 @@ impl InstanceImage {
}
}
#[cfg(all(unix, target_arch = "x86_64"))]
pub mod x64_decl {
use super::*;
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd, Hash)]
pub enum GPR {
RAX,
RCX,
RDX,
RBX,
RSP,
RBP,
RSI,
RDI,
R8,
R9,
R10,
R11,
R12,
R13,
R14,
R15,
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd, Hash)]
pub enum XMM {
XMM0,
XMM1,
XMM2,
XMM3,
XMM4,
XMM5,
XMM6,
XMM7,
}
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
pub enum X64Register {
GPR(GPR),
XMM(XMM),
}
impl X64Register {
pub fn to_index(&self) -> RegisterIndex {
match *self {
X64Register::GPR(x) => RegisterIndex(x as usize),
X64Register::XMM(x) => RegisterIndex(x as usize + 16),
}
}
pub fn from_dwarf_regnum(x: u16) -> Option<X64Register> {
Some(match x {
0 => X64Register::GPR(GPR::RAX),
1 => X64Register::GPR(GPR::RDX),
2 => X64Register::GPR(GPR::RCX),
3 => X64Register::GPR(GPR::RBX),
4 => X64Register::GPR(GPR::RSI),
5 => X64Register::GPR(GPR::RDI),
6 => X64Register::GPR(GPR::RBP),
7 => X64Register::GPR(GPR::RSP),
8 => X64Register::GPR(GPR::R8),
9 => X64Register::GPR(GPR::R9),
10 => X64Register::GPR(GPR::R10),
11 => X64Register::GPR(GPR::R11),
12 => X64Register::GPR(GPR::R12),
13 => X64Register::GPR(GPR::R13),
14 => X64Register::GPR(GPR::R14),
15 => X64Register::GPR(GPR::R15),
17 => X64Register::XMM(XMM::XMM0),
18 => X64Register::XMM(XMM::XMM1),
19 => X64Register::XMM(XMM::XMM2),
20 => X64Register::XMM(XMM::XMM3),
21 => X64Register::XMM(XMM::XMM4),
22 => X64Register::XMM(XMM::XMM5),
23 => X64Register::XMM(XMM::XMM6),
24 => X64Register::XMM(XMM::XMM7),
_ => return None,
})
}
}
}
pub mod x64 {
pub use super::x64_decl::*;
use super::*;
use crate::codegen::BreakpointMap;
use crate::fault::{
@ -998,84 +1081,4 @@ pub mod x64 {
unreachable!();
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd, Hash)]
pub enum GPR {
RAX,
RCX,
RDX,
RBX,
RSP,
RBP,
RSI,
RDI,
R8,
R9,
R10,
R11,
R12,
R13,
R14,
R15,
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd, Hash)]
pub enum XMM {
XMM0,
XMM1,
XMM2,
XMM3,
XMM4,
XMM5,
XMM6,
XMM7,
}
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
pub enum X64Register {
GPR(GPR),
XMM(XMM),
}
impl X64Register {
pub fn to_index(&self) -> RegisterIndex {
match *self {
X64Register::GPR(x) => RegisterIndex(x as usize),
X64Register::XMM(x) => RegisterIndex(x as usize + 16),
}
}
pub fn from_dwarf_regnum(x: u16) -> Option<X64Register> {
Some(match x {
0 => X64Register::GPR(GPR::RAX),
1 => X64Register::GPR(GPR::RDX),
2 => X64Register::GPR(GPR::RCX),
3 => X64Register::GPR(GPR::RBX),
4 => X64Register::GPR(GPR::RSI),
5 => X64Register::GPR(GPR::RDI),
6 => X64Register::GPR(GPR::RBP),
7 => X64Register::GPR(GPR::RSP),
8 => X64Register::GPR(GPR::R8),
9 => X64Register::GPR(GPR::R9),
10 => X64Register::GPR(GPR::R10),
11 => X64Register::GPR(GPR::R11),
12 => X64Register::GPR(GPR::R12),
13 => X64Register::GPR(GPR::R13),
14 => X64Register::GPR(GPR::R14),
15 => X64Register::GPR(GPR::R15),
17 => X64Register::XMM(XMM::XMM0),
18 => X64Register::XMM(XMM::XMM1),
19 => X64Register::XMM(XMM::XMM2),
20 => X64Register::XMM(XMM::XMM3),
21 => X64Register::XMM(XMM::XMM4),
22 => X64Register::XMM(XMM::XMM5),
23 => X64Register::XMM(XMM::XMM6),
24 => X64Register::XMM(XMM::XMM7),
_ => return None,
})
}
}
}