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The aarch64 architecture is support normal memory unaligned accesses,
so add the UNALIGNED_LE_CPU to the aarch64 .
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@ -58,7 +58,8 @@ int siptlw(int c) {
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/* Test of the CPU is Little Endian and supports not aligned accesses.
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/* Test of the CPU is Little Endian and supports not aligned accesses.
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* Two interesting conditions to speedup the function that happen to be
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* Two interesting conditions to speedup the function that happen to be
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* in most of x86 servers. */
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* in most of x86 servers. */
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#if defined(__X86_64__) || defined(__x86_64__) || defined (__i386__)
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#if defined(__X86_64__) || defined(__x86_64__) || defined (__i386__) \
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|| defined (__aarch64__) || defined (__arm64__)
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#define UNALIGNED_LE_CPU
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#define UNALIGNED_LE_CPU
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#endif
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#endif
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