2017-03-31 03:28:03 +03:00
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use std::io;
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2017-04-03 17:31:51 +03:00
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use super::{
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Serialize, Deserialize, Error, VarUint7,
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2017-03-31 05:22:49 +03:00
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VarUint1, VarUint32, CountedList, BlockType,
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2017-04-03 19:51:18 +03:00
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Uint32, VarUint64, Uint64, CountedListWriter
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2017-03-31 05:22:49 +03:00
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};
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2017-03-31 03:28:03 +03:00
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2017-04-04 03:03:57 +03:00
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/// Collection of opcodes (usually inside a block section).
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2017-04-03 23:56:21 +03:00
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#[derive(Debug)]
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2017-03-31 03:28:03 +03:00
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pub struct Opcodes(Vec<Opcode>);
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2017-03-31 05:22:49 +03:00
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impl Opcodes {
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2017-04-10 13:11:34 +03:00
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/// New list of opcodes from vector of opcodes.
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2017-04-03 20:19:20 +03:00
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pub fn new(elements: Vec<Opcode>) -> Self {
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Opcodes(elements)
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}
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2017-04-10 13:11:34 +03:00
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/// Empty expression with only `Opcode::End` opcode.
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2017-04-07 15:45:52 +03:00
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pub fn empty() -> Self {
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Opcodes(vec![Opcode::End])
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}
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2017-04-10 13:11:34 +03:00
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/// List of individual opcodes.
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2017-03-31 05:22:49 +03:00
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pub fn elements(&self) -> &[Opcode] { &self.0 }
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2017-04-10 13:11:34 +03:00
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/// Individual opcodes, mutable.
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pub fn elements_mut(&mut self) -> &mut Vec<Opcode> { &mut self.0 }
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2017-03-31 05:22:49 +03:00
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}
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2017-03-31 17:31:33 +03:00
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impl Deserialize for Opcodes {
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type Error = Error;
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fn deserialize<R: io::Read>(reader: &mut R) -> Result<Self, Self::Error> {
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let mut opcodes = Vec::new();
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loop {
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let opcode = Opcode::deserialize(reader)?;
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let is_terminal = opcode.is_terminal();
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opcodes.push(opcode);
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if is_terminal {
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break;
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}
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}
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Ok(Opcodes(opcodes))
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}
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}
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2017-04-04 03:03:57 +03:00
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/// Initialization expression.
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2017-03-31 17:31:33 +03:00
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pub struct InitExpr(Vec<Opcode>);
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2017-04-03 18:15:13 +03:00
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impl InitExpr {
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2017-04-04 03:03:57 +03:00
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/// New initialization expression from list of opcodes.
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/// `code` must end with the `Opcode::End` opcode!
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2017-04-03 18:15:13 +03:00
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pub fn new(code: Vec<Opcode>) -> Self {
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InitExpr(code)
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}
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2017-04-04 03:03:57 +03:00
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/// Empty expression with only `Opcode::End` opcode
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2017-04-03 18:15:13 +03:00
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pub fn empty() -> Self {
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InitExpr(vec![Opcode::End])
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}
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2017-04-04 03:03:57 +03:00
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/// List of opcodes used in the expression.
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2017-04-03 18:15:13 +03:00
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pub fn code(&self) -> &[Opcode] {
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&self.0
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}
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}
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2017-03-31 17:31:33 +03:00
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// todo: check if kind of opcode sequence is valid as an expression
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impl Deserialize for InitExpr {
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type Error = Error;
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fn deserialize<R: io::Read>(reader: &mut R) -> Result<Self, Self::Error> {
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let mut opcodes = Vec::new();
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loop {
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let opcode = Opcode::deserialize(reader)?;
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let is_terminal = opcode.is_terminal();
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opcodes.push(opcode);
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if is_terminal {
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break;
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}
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}
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Ok(InitExpr(opcodes))
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}
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}
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2017-04-04 03:03:57 +03:00
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/// Opcode
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2017-04-03 23:56:21 +03:00
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#[derive(Debug)]
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2017-04-04 03:03:57 +03:00
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#[allow(missing_docs)]
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2017-03-31 03:28:03 +03:00
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pub enum Opcode {
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Unreachable,
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Nop,
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Block(BlockType, Opcodes),
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Loop(BlockType, Opcodes),
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If(BlockType, Opcodes),
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Else,
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End,
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Br(u32),
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BrIf(u32),
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BrTable(Vec<u32>, u32),
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Return,
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Call(u32),
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CallIndirect(u32, bool),
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Drop,
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Select,
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GetLocal(u32),
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SetLocal(u32),
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TeeLocal(u32),
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GetGlobal(u32),
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SetGlobal(u32),
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I32Load(u32, u32),
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I64Load(u32, u32),
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F32Load(u32, u32),
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F64Load(u32, u32),
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I32Load8S(u32, u32),
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I32Load8U(u32, u32),
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I32Load16S(u32, u32),
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I32Load16U(u32, u32),
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I64Load8S(u32, u32),
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I64Load8U(u32, u32),
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I64Load16S(u32, u32),
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I64Load16U(u32, u32),
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I64Load32S(u32, u32),
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I64Load32U(u32, u32),
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I32Store(u32, u32),
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I64Store(u32, u32),
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F32Store(u32, u32),
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F64Store(u32, u32),
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I32Store8(u32, u32),
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I32Store16(u32, u32),
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I64Store8(u32, u32),
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I64Store16(u32, u32),
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I64Store32(u32, u32),
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CurrentMemory(bool),
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GrowMemory(bool),
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I32Const(u32),
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I64Const(u64),
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F32Const(u32),
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F64Const(u64),
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I32Eqz,
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I32Eq,
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I32Ne,
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I32LtS,
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I32LtU,
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I32GtS,
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I32GtU,
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I32LeS,
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I32LeU,
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I32GeS,
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I32GeU,
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I64Eqz,
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I64Eq,
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I64Ne,
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I64LtS,
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I64LtU,
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I64GtS,
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I64GtU,
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I64LeS,
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I64LeU,
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I64GeS,
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I64GeU,
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F32Eq,
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F32Ne,
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F32Lt,
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F32Gt,
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F32Le,
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F32Ge,
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F64Eq,
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F64Ne,
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F64Lt,
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F64Gt,
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F64Le,
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F64Ge,
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I32Clz,
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I32Ctz,
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I32Popcnt,
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I32Add,
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I32Sub,
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I32Mul,
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I32DivS,
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I32DivU,
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I32RemS,
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I32RemU,
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I32And,
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I32Or,
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I32Xor,
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I32Shl,
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I32ShlS,
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I32ShrU,
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I32Rotl,
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I32Rotr,
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I64Clz,
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I64Ctz,
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I64Popcnt,
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I64Add,
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I64Sub,
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I64Mul,
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I64DivS,
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I64DivU,
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I64RemS,
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I64RemU,
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I64And,
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I64Or,
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I64Xor,
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I64Shl,
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I64ShrS,
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I64ShrU,
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I64Rotl,
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I64Rotr,
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F32Abs,
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F32Neg,
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F32Ceil,
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F32Floor,
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F32Trunc,
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F32Nearest,
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F32Sqrt,
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F32Add,
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F32Sub,
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F32Mul,
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F32Div,
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F32Min,
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F32Max,
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F32Copysign,
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F64Abs,
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F64Neg,
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F64Ceil,
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F64Floor,
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F64Trunc,
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F64Nearest,
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F64Sqrt,
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F64Add,
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F64Sub,
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F64Mul,
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F64Div,
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F64Min,
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F64Max,
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F64Copysign,
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I32WarpI64,
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I32TruncSF32,
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I32TruncUF32,
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I32TruncSF64,
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I32TruncUF64,
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I64ExtendSI32,
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I64ExtendUI32,
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I64TruncSF32,
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I64TruncUF32,
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I64TruncSF64,
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I64TruncUF64,
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F32ConvertSI32,
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F32ConvertUI32,
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F32ConvertSI64,
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F32ConvertUI64,
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F32DemoteF64,
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F64ConvertSI32,
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F64ConvertUI32,
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F64ConvertSI64,
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F64ConvertUI64,
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F64PromoteF32,
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I32ReinterpretF32,
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I64ReinterpretF64,
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F32ReinterpretI32,
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F64ReinterpretI64,
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2017-03-31 04:04:51 +03:00
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}
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impl Opcode {
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2017-04-04 03:03:57 +03:00
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/// Is this opcode determines the termination of opcode sequence
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/// `true` for `Opcode::End`
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2017-03-31 04:04:51 +03:00
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pub fn is_terminal(&self) -> bool {
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match self {
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&Opcode::End => true,
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_ => false,
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}
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}
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}
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impl Deserialize for Opcode {
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type Error = Error;
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fn deserialize<R: io::Read>(reader: &mut R) -> Result<Self, Self::Error> {
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use self::Opcode::*;
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let val: u8 = VarUint7::deserialize(reader)?.into();
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Ok(
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match val {
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0x00 => Unreachable,
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0x01 => Nop,
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0x02 => Block(BlockType::deserialize(reader)?, Opcodes::deserialize(reader)?),
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2017-03-31 05:22:49 +03:00
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0x03 => Loop(BlockType::deserialize(reader)?, Opcodes::deserialize(reader)?),
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0x04 => If(BlockType::deserialize(reader)?, Opcodes::deserialize(reader)?),
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0x05 => Else,
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2017-03-31 04:04:51 +03:00
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0x0b => End,
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2017-03-31 05:22:49 +03:00
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0x0c => Br(VarUint32::deserialize(reader)?.into()),
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0x0d => BrIf(VarUint32::deserialize(reader)?.into()),
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0x0e => {
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let t1: Vec<u32> = CountedList::<VarUint32>::deserialize(reader)?
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.into_inner()
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.into_iter()
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.map(Into::into)
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.collect();
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BrTable(t1, VarUint32::deserialize(reader)?.into())
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},
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0x0f => Return,
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0x10 => Call(VarUint32::deserialize(reader)?.into()),
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0x11 => CallIndirect(
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VarUint32::deserialize(reader)?.into(),
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VarUint1::deserialize(reader)?.into()),
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0x1a => Drop,
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0x1b => Select,
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0x20 => GetLocal(VarUint32::deserialize(reader)?.into()),
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2017-03-31 04:04:51 +03:00
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0x21 => SetLocal(VarUint32::deserialize(reader)?.into()),
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2017-03-31 05:22:49 +03:00
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0x22 => TeeLocal(VarUint32::deserialize(reader)?.into()),
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2017-03-31 04:04:51 +03:00
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0x23 => GetGlobal(VarUint32::deserialize(reader)?.into()),
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0x24 => SetGlobal(VarUint32::deserialize(reader)?.into()),
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2017-03-31 05:22:49 +03:00
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0x28 => I32Load(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x29 => I64Load(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2a => F32Load(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2b => F64Load(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2c => I32Load8S(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2d => I32Load8U(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2e => I32Load16S(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x2f => I32Load16U(
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VarUint32::deserialize(reader)?.into(),
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VarUint32::deserialize(reader)?.into()),
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0x30 => I64Load8S(
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VarUint32::deserialize(reader)?.into(),
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|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x31 => I64Load8U(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x32 => I64Load16S(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x33 => I64Load16U(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x34 => I64Load32S(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x35 => I64Load32U(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x36 => I32Store(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x37 => I64Store(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x38 => F32Store(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x39 => F64Store(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x3a => I32Store8(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x3b => I32Store16(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x3c => I64Store8(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x3d => I64Store16(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
0x3e => I64Store32(
|
|
|
|
VarUint32::deserialize(reader)?.into(),
|
|
|
|
VarUint32::deserialize(reader)?.into()),
|
|
|
|
|
|
|
|
|
|
|
|
0x3f => CurrentMemory(VarUint1::deserialize(reader)?.into()),
|
|
|
|
0x40 => GrowMemory(VarUint1::deserialize(reader)?.into()),
|
|
|
|
|
2017-03-31 04:04:51 +03:00
|
|
|
0x41 => I32Const(VarUint32::deserialize(reader)?.into()),
|
2017-03-31 05:22:49 +03:00
|
|
|
0x42 => I64Const(VarUint64::deserialize(reader)?.into()),
|
|
|
|
0x43 => F32Const(Uint32::deserialize(reader)?.into()),
|
|
|
|
0x44 => F64Const(Uint64::deserialize(reader)?.into()),
|
|
|
|
0x45 => I32Eqz,
|
|
|
|
0x46 => I32Eq,
|
|
|
|
0x47 => I32Ne,
|
|
|
|
0x48 => I32LtS,
|
|
|
|
0x49 => I32LtU,
|
|
|
|
0x4a => I32GtS,
|
|
|
|
0x4b => I32GtU,
|
|
|
|
0x4c => I32LeS,
|
|
|
|
0x4d => I32LeU,
|
|
|
|
0x4e => I32GeS,
|
|
|
|
0x4f => I32GeU,
|
|
|
|
|
|
|
|
0x50 => I64Eqz,
|
|
|
|
0x51 => I64Eq,
|
|
|
|
0x52 => I64Ne,
|
|
|
|
0x53 => I64LtS,
|
|
|
|
0x54 => I64LtU,
|
|
|
|
0x55 => I64GtS,
|
|
|
|
0x56 => I64GtU,
|
|
|
|
0x57 => I64LeS,
|
|
|
|
0x58 => I64LeU,
|
|
|
|
0x59 => I64GeS,
|
|
|
|
0x5a => I64GeU,
|
|
|
|
|
|
|
|
0x5b => F32Eq,
|
|
|
|
0x5c => F32Ne,
|
|
|
|
0x5d => F32Lt,
|
|
|
|
0x5e => F32Gt,
|
|
|
|
0x5f => F32Le,
|
|
|
|
0x60 => F32Ge,
|
2017-03-31 04:04:51 +03:00
|
|
|
|
2017-03-31 05:22:49 +03:00
|
|
|
0x61 => F64Eq,
|
|
|
|
0x62 => F64Ne,
|
|
|
|
0x63 => F64Lt,
|
|
|
|
0x64 => F64Gt,
|
|
|
|
0x65 => F64Le,
|
|
|
|
0x66 => F64Ge,
|
|
|
|
|
|
|
|
0x67 => I32Clz,
|
|
|
|
0x68 => I32Ctz,
|
|
|
|
0x69 => I32Popcnt,
|
2017-03-31 04:04:51 +03:00
|
|
|
0x6a => I32Add,
|
2017-03-31 05:22:49 +03:00
|
|
|
0x6b => I32Sub,
|
|
|
|
0x6c => I32Mul,
|
|
|
|
0x6d => I32DivS,
|
|
|
|
0x6e => I32DivU,
|
|
|
|
0x6f => I32RemS,
|
|
|
|
0x70 => I32RemU,
|
2017-03-31 04:04:51 +03:00
|
|
|
0x71 => I32And,
|
2017-03-31 05:22:49 +03:00
|
|
|
0x72 => I32Or,
|
|
|
|
0x73 => I32Xor,
|
|
|
|
0x74 => I32Shl,
|
|
|
|
0x75 => I32ShlS,
|
|
|
|
0x76 => I32ShrU,
|
|
|
|
0x77 => I32Rotl,
|
|
|
|
0x78 => I32Rotr,
|
|
|
|
|
|
|
|
0x79 => I64Clz,
|
|
|
|
0x7a => I64Ctz,
|
|
|
|
0x7b => I64Popcnt,
|
|
|
|
0x7c => I64Add,
|
|
|
|
0x7d => I64Sub,
|
|
|
|
0x7e => I64Mul,
|
|
|
|
0x7f => I64DivS,
|
|
|
|
0x80 => I64DivU,
|
|
|
|
0x81 => I64RemS,
|
|
|
|
0x82 => I64RemU,
|
|
|
|
0x83 => I64And,
|
|
|
|
0x84 => I64Or,
|
|
|
|
0x85 => I64Xor,
|
|
|
|
0x86 => I64Shl,
|
|
|
|
0x87 => I64ShrS,
|
|
|
|
0x88 => I64ShrU,
|
|
|
|
0x89 => I64Rotl,
|
|
|
|
0x8a => I64Rotr,
|
|
|
|
0x8b => F32Abs,
|
|
|
|
0x8c => F32Neg,
|
|
|
|
0x8d => F32Ceil,
|
|
|
|
0x8e => F32Floor,
|
|
|
|
0x8f => F32Trunc,
|
|
|
|
0x90 => F32Nearest,
|
|
|
|
0x91 => F32Sqrt,
|
|
|
|
0x92 => F32Add,
|
|
|
|
0x93 => F32Sub,
|
|
|
|
0x94 => F32Mul,
|
|
|
|
0x95 => F32Div,
|
|
|
|
0x96 => F32Min,
|
|
|
|
0x97 => F32Max,
|
|
|
|
0x98 => F32Copysign,
|
|
|
|
0x99 => F64Abs,
|
|
|
|
0x9a => F64Neg,
|
|
|
|
0x9b => F64Ceil,
|
|
|
|
0x9c => F64Floor,
|
|
|
|
0x9d => F64Trunc,
|
|
|
|
0x9e => F64Nearest,
|
|
|
|
0x9f => F64Sqrt,
|
|
|
|
0xa0 => F64Add,
|
|
|
|
0xa1 => F64Sub,
|
|
|
|
0xa2 => F64Mul,
|
|
|
|
0xa3 => F64Div,
|
|
|
|
0xa4 => F64Min,
|
|
|
|
0xa5 => F64Max,
|
|
|
|
0xa6 => F64Copysign,
|
|
|
|
|
|
|
|
0xa7 => I32WarpI64,
|
|
|
|
0xa8 => I32TruncSF32,
|
|
|
|
0xa9 => I32TruncUF32,
|
|
|
|
0xaa => I32TruncSF64,
|
|
|
|
0xab => I32TruncUF64,
|
|
|
|
0xac => I64ExtendSI32,
|
|
|
|
0xad => I64ExtendUI32,
|
|
|
|
0xae => I64TruncSF32,
|
|
|
|
0xaf => I64TruncUF32,
|
|
|
|
0xb0 => I64TruncSF64,
|
|
|
|
0xb1 => I64TruncUF64,
|
|
|
|
0xb2 => F32ConvertSI32,
|
|
|
|
0xb3 => F32ConvertUI32,
|
|
|
|
0xb4 => F32ConvertSI64,
|
|
|
|
0xb5 => F32ConvertUI64,
|
|
|
|
0xb6 => F32DemoteF64,
|
|
|
|
0xb7 => F64ConvertSI32,
|
|
|
|
0xb8 => F64ConvertUI32,
|
|
|
|
0xb9 => F64ConvertSI64,
|
|
|
|
0xba => F64ConvertUI64,
|
|
|
|
0xbb => F64PromoteF32,
|
|
|
|
|
|
|
|
0xbc => I32ReinterpretF32,
|
|
|
|
0xbd => I64ReinterpretF64,
|
|
|
|
0xbe => F32ReinterpretI32,
|
|
|
|
0xbf => F64ReinterpretI64,
|
2017-03-31 04:04:51 +03:00
|
|
|
|
|
|
|
_ => { return Err(Error::UnknownOpcode(val)); }
|
|
|
|
}
|
|
|
|
)
|
|
|
|
}
|
|
|
|
}
|
2017-04-03 17:31:51 +03:00
|
|
|
|
|
|
|
macro_rules! op {
|
|
|
|
($writer: expr, $byte: expr) => ({
|
|
|
|
let b: u8 = $byte;
|
|
|
|
$writer.write_all(&[b])?;
|
|
|
|
});
|
|
|
|
($writer: expr, $byte: expr, $s: block) => ({
|
|
|
|
op!($writer, $byte);
|
|
|
|
$s;
|
|
|
|
});
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Serialize for Opcode {
|
|
|
|
type Error = Error;
|
|
|
|
|
|
|
|
fn serialize<W: io::Write>(self, writer: &mut W) -> Result<(), Self::Error> {
|
|
|
|
use self::Opcode::*;
|
|
|
|
|
|
|
|
match self {
|
|
|
|
Unreachable => op!(writer, 0x00),
|
|
|
|
Nop => op!(writer, 0x01),
|
|
|
|
Block(block_type, ops) => op!(writer, 0x02, {
|
|
|
|
block_type.serialize(writer)?;
|
|
|
|
ops.serialize(writer)?;
|
2017-04-03 19:51:18 +03:00
|
|
|
}),
|
|
|
|
Loop(block_type, ops) => op!(writer, 0x03, {
|
|
|
|
block_type.serialize(writer)?;
|
|
|
|
ops.serialize(writer)?;
|
|
|
|
}),
|
|
|
|
If(block_type, ops) => op!(writer, 0x04, {
|
|
|
|
block_type.serialize(writer)?;
|
|
|
|
ops.serialize(writer)?;
|
|
|
|
}),
|
|
|
|
Else => op!(writer, 0x05),
|
|
|
|
End => op!(writer, 0x0b),
|
|
|
|
Br(idx) => op!(writer, 0x0c, {
|
|
|
|
VarUint32::from(idx).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
BrIf(idx) => op!(writer, 0x0d, {
|
|
|
|
VarUint32::from(idx).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
BrTable(table, default) => op!(writer, 0x0e, {
|
|
|
|
let list_writer = CountedListWriter::<VarUint32, _>(
|
|
|
|
table.len(),
|
|
|
|
table.into_iter().map(Into::into),
|
|
|
|
);
|
|
|
|
list_writer.serialize(writer)?;
|
|
|
|
VarUint32::from(default).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
Return => op!(writer, 0x0f),
|
|
|
|
Call(index) => op!(writer, 0x10, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
CallIndirect(index, reserved) => op!(writer, 0x11, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
VarUint1::from(reserved).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
Drop => op!(writer, 0x1a),
|
|
|
|
Select => op!(writer, 0x1b),
|
|
|
|
GetLocal(index) => op!(writer, 0x20, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
SetLocal(index) => op!(writer, 0x21, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
TeeLocal(index) => op!(writer, 0x22, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
GetGlobal(index) => op!(writer, 0x23, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
SetGlobal(index) => op!(writer, 0x24, {
|
|
|
|
VarUint32::from(index).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Load(from, to) => op!(writer, 0x28, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load(from, to) => op!(writer, 0x29, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F32Load(from, to) => op!(writer, 0x2a, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F64Load(from, to) => op!(writer, 0x2b, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Load8S(from, to) => op!(writer, 0x2c, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Load8U(from, to) => op!(writer, 0x2d, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Load16S(from, to) => op!(writer, 0x2e, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Load16U(from, to) => op!(writer, 0x2f, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load8S(from, to) => op!(writer, 0x30, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load8U(from, to) => op!(writer, 0x31, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load16S(from, to) => op!(writer, 0x32, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load16U(from, to) => op!(writer, 0x33, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load32S(from, to) => op!(writer, 0x34, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Load32U(from, to) => op!(writer, 0x35, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Store(from, to) => op!(writer, 0x36, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Store(from, to) => op!(writer, 0x37, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F32Store(from, to) => op!(writer, 0x38, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F64Store(from, to) => op!(writer, 0x39, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Store8(from, to) => op!(writer, 0x3a, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Store16(from, to) => op!(writer, 0x3b, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Store8(from, to) => op!(writer, 0x3c, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Store16(from, to) => op!(writer, 0x3d, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Store32(from, to) => op!(writer, 0x3e, {
|
|
|
|
VarUint32::from(from).serialize(writer)?;
|
|
|
|
VarUint32::from(to).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
CurrentMemory(flag) => op!(writer, 0x3f, {
|
|
|
|
VarUint1::from(flag).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
GrowMemory(flag) => op!(writer, 0x40, {
|
|
|
|
VarUint1::from(flag).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I32Const(def) => op!(writer, 0x41, {
|
|
|
|
VarUint32::from(def).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
I64Const(def) => op!(writer, 0x42, {
|
|
|
|
VarUint64::from(def).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F32Const(def) => op!(writer, 0x43, {
|
|
|
|
Uint32::from(def).serialize(writer)?;
|
|
|
|
}),
|
|
|
|
F64Const(def) => op!(writer, 0x44, {
|
|
|
|
Uint64::from(def).serialize(writer)?;
|
|
|
|
}),
|
2017-04-03 19:57:56 +03:00
|
|
|
I32Eqz => op!(writer, 0x45),
|
|
|
|
I32Eq => op!(writer, 0x46),
|
|
|
|
I32Ne => op!(writer, 0x47),
|
|
|
|
I32LtS => op!(writer, 0x48),
|
|
|
|
I32LtU => op!(writer, 0x49),
|
|
|
|
I32GtS => op!(writer, 0x4a),
|
|
|
|
I32GtU => op!(writer, 0x4b),
|
|
|
|
I32LeS => op!(writer, 0x4c),
|
|
|
|
I32LeU => op!(writer, 0x4d),
|
|
|
|
I32GeS => op!(writer, 0x4e),
|
|
|
|
I32GeU => op!(writer, 0x4f),
|
2017-04-03 19:51:18 +03:00
|
|
|
|
2017-04-03 19:57:56 +03:00
|
|
|
I64Eqz => op!(writer, 0x50),
|
|
|
|
I64Eq => op!(writer, 0x51),
|
|
|
|
I64Ne => op!(writer, 0x52),
|
|
|
|
I64LtS => op!(writer, 0x53),
|
|
|
|
I64LtU => op!(writer, 0x54),
|
|
|
|
I64GtS => op!(writer, 0x55),
|
|
|
|
I64GtU => op!(writer, 0x56),
|
|
|
|
I64LeS => op!(writer, 0x57),
|
|
|
|
I64LeU => op!(writer, 0x58),
|
|
|
|
I64GeS => op!(writer, 0x59),
|
|
|
|
I64GeU => op!(writer, 0x5a),
|
|
|
|
|
|
|
|
F32Eq => op!(writer, 0x5b),
|
|
|
|
F32Ne => op!(writer, 0x5c),
|
|
|
|
F32Lt => op!(writer, 0x5d),
|
|
|
|
F32Gt => op!(writer, 0x5e),
|
|
|
|
F32Le => op!(writer, 0x5f),
|
|
|
|
F32Ge => op!(writer, 0x60),
|
|
|
|
|
|
|
|
F64Eq => op!(writer, 0x61),
|
|
|
|
F64Ne => op!(writer, 0x62),
|
|
|
|
F64Lt => op!(writer, 0x63),
|
|
|
|
F64Gt => op!(writer, 0x64),
|
|
|
|
F64Le => op!(writer, 0x65),
|
|
|
|
F64Ge => op!(writer, 0x66),
|
|
|
|
|
|
|
|
I32Clz => op!(writer, 0x67),
|
|
|
|
I32Ctz => op!(writer, 0x68),
|
|
|
|
I32Popcnt => op!(writer, 0x69),
|
|
|
|
I32Add => op!(writer, 0x6a),
|
|
|
|
I32Sub => op!(writer, 0x6b),
|
|
|
|
I32Mul => op!(writer, 0x6c),
|
|
|
|
I32DivS => op!(writer, 0x6d),
|
|
|
|
I32DivU => op!(writer, 0x6e),
|
|
|
|
I32RemS => op!(writer, 0x6f),
|
|
|
|
I32RemU => op!(writer, 0x70),
|
|
|
|
I32And => op!(writer, 0x71),
|
|
|
|
I32Or => op!(writer, 0x72),
|
|
|
|
I32Xor => op!(writer, 0x73),
|
|
|
|
I32Shl => op!(writer, 0x74),
|
|
|
|
I32ShlS => op!(writer, 0x75),
|
|
|
|
I32ShrU => op!(writer, 0x76),
|
|
|
|
I32Rotl => op!(writer, 0x77),
|
|
|
|
I32Rotr => op!(writer, 0x78),
|
|
|
|
|
|
|
|
I64Clz => op!(writer, 0x79),
|
|
|
|
I64Ctz => op!(writer, 0x7a),
|
|
|
|
I64Popcnt => op!(writer, 0x7b),
|
|
|
|
I64Add => op!(writer, 0x7c),
|
|
|
|
I64Sub => op!(writer, 0x7d),
|
|
|
|
I64Mul => op!(writer, 0x7e),
|
|
|
|
I64DivS => op!(writer, 0x7f),
|
|
|
|
I64DivU => op!(writer, 0x80),
|
|
|
|
I64RemS => op!(writer, 0x81),
|
|
|
|
I64RemU => op!(writer, 0x82),
|
|
|
|
I64And => op!(writer, 0x83),
|
|
|
|
I64Or => op!(writer, 0x84),
|
|
|
|
I64Xor => op!(writer, 0x85),
|
|
|
|
I64Shl => op!(writer, 0x86),
|
|
|
|
I64ShrS => op!(writer, 0x87),
|
|
|
|
I64ShrU => op!(writer, 0x88),
|
|
|
|
I64Rotl => op!(writer, 0x89),
|
|
|
|
I64Rotr => op!(writer, 0x8a),
|
|
|
|
F32Abs => op!(writer, 0x8b),
|
|
|
|
F32Neg => op!(writer, 0x8c),
|
|
|
|
F32Ceil => op!(writer, 0x8d),
|
|
|
|
F32Floor => op!(writer, 0x8e),
|
|
|
|
F32Trunc => op!(writer, 0x8f),
|
|
|
|
F32Nearest => op!(writer, 0x90),
|
|
|
|
F32Sqrt => op!(writer, 0x91),
|
|
|
|
F32Add => op!(writer, 0x92),
|
|
|
|
F32Sub => op!(writer, 0x93),
|
|
|
|
F32Mul => op!(writer, 0x94),
|
|
|
|
F32Div => op!(writer, 0x95),
|
|
|
|
F32Min => op!(writer, 0x96),
|
|
|
|
F32Max => op!(writer, 0x97),
|
|
|
|
F32Copysign => op!(writer, 0x98),
|
|
|
|
F64Abs => op!(writer, 0x99),
|
|
|
|
F64Neg => op!(writer, 0x9a),
|
|
|
|
F64Ceil => op!(writer, 0x9b),
|
|
|
|
F64Floor => op!(writer, 0x9c),
|
|
|
|
F64Trunc => op!(writer, 0x9d),
|
|
|
|
F64Nearest => op!(writer, 0x9e),
|
|
|
|
F64Sqrt => op!(writer, 0x9f),
|
|
|
|
F64Add => op!(writer, 0xa0),
|
|
|
|
F64Sub => op!(writer, 0xa1),
|
|
|
|
F64Mul => op!(writer, 0xa2),
|
|
|
|
F64Div => op!(writer, 0xa3),
|
|
|
|
F64Min => op!(writer, 0xa4),
|
|
|
|
F64Max => op!(writer, 0xa5),
|
|
|
|
F64Copysign => op!(writer, 0xa6),
|
|
|
|
|
|
|
|
I32WarpI64 => op!(writer, 0xa7),
|
|
|
|
I32TruncSF32 => op!(writer, 0xa8),
|
|
|
|
I32TruncUF32 => op!(writer, 0xa9),
|
|
|
|
I32TruncSF64 => op!(writer, 0xaa),
|
|
|
|
I32TruncUF64 => op!(writer, 0xab),
|
|
|
|
I64ExtendSI32 => op!(writer, 0xac),
|
|
|
|
I64ExtendUI32 => op!(writer, 0xad),
|
|
|
|
I64TruncSF32 => op!(writer, 0xae),
|
|
|
|
I64TruncUF32 => op!(writer, 0xaf),
|
|
|
|
I64TruncSF64 => op!(writer, 0xb0),
|
|
|
|
I64TruncUF64 => op!(writer, 0xb1),
|
|
|
|
F32ConvertSI32 => op!(writer, 0xb2),
|
|
|
|
F32ConvertUI32 => op!(writer, 0xb3),
|
|
|
|
F32ConvertSI64 => op!(writer, 0xb4),
|
|
|
|
F32ConvertUI64 => op!(writer, 0xb5),
|
|
|
|
F32DemoteF64 => op!(writer, 0xb6),
|
|
|
|
F64ConvertSI32 => op!(writer, 0xb7),
|
|
|
|
F64ConvertUI32 => op!(writer, 0xb8),
|
|
|
|
F64ConvertSI64 => op!(writer, 0xb9),
|
|
|
|
F64ConvertUI64 => op!(writer, 0xba),
|
|
|
|
F64PromoteF32 => op!(writer, 0xbb),
|
|
|
|
|
|
|
|
I32ReinterpretF32 => op!(writer, 0xbc),
|
|
|
|
I64ReinterpretF64 => op!(writer, 0xbd),
|
|
|
|
F32ReinterpretI32 => op!(writer, 0xbe),
|
|
|
|
F64ReinterpretI64 => op!(writer, 0xbf),
|
2017-04-03 17:31:51 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
Ok(())
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Serialize for Opcodes {
|
|
|
|
type Error = Error;
|
|
|
|
|
|
|
|
fn serialize<W: io::Write>(self, writer: &mut W) -> Result<(), Self::Error> {
|
|
|
|
for op in self.0.into_iter() {
|
|
|
|
op.serialize(writer)?;
|
|
|
|
}
|
|
|
|
|
|
|
|
Ok(())
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Serialize for InitExpr {
|
|
|
|
type Error = Error;
|
|
|
|
|
|
|
|
fn serialize<W: io::Write>(self, writer: &mut W) -> Result<(), Self::Error> {
|
|
|
|
for op in self.0.into_iter() {
|
|
|
|
op.serialize(writer)?;
|
|
|
|
}
|
|
|
|
|
|
|
|
Ok(())
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|