mirror of
https://github.com/fluencelabs/musl
synced 2025-06-08 12:31:34 +00:00
linux, gcc, etc. all use "sh" as the name for the superh arch. there was already some inconsistency internally in musl: the dynamic linker was searching for "ld-musl-sh.path" as its path file despite its own name being "ld-musl-superh.so.1". there was some sentiment in both directions as to how to resolve the inconsistency, but overall "sh" was favored.
147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
#include "libc.h"
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#define LLSC_CLOBBERS "r0", "t", "memory"
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#define LLSC_START(mem) \
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"0: movli.l @" mem ", r0\n"
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#define LLSC_END(mem) \
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"1: movco.l r0, @" mem "\n" \
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" bf 0b\n" \
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" synco\n"
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/* gusa is a hack in the kernel which lets you create a sequence of instructions
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* which will be restarted if the process is preempted in the middle of the
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* sequence. It will do for implementing atomics on non-smp systems. ABI is:
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* r0 = address of first instruction after the atomic sequence
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* r1 = original stack pointer
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* r15 = -1 * length of atomic sequence in bytes
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*/
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#define GUSA_CLOBBERS "r0", "r1", "memory"
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#define GUSA_START(mem,old,nop) \
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" .align 2\n" \
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" mova 1f, r0\n" \
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nop \
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" mov r15, r1\n" \
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" mov #(0f-1f), r15\n" \
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"0: mov.l @" mem ", " old "\n"
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/* the target of mova must be 4 byte aligned, so we may need a nop */
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#define GUSA_START_ODD(mem,old) GUSA_START(mem,old,"")
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#define GUSA_START_EVEN(mem,old) GUSA_START(mem,old,"\tnop\n")
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#define GUSA_END(mem,new) \
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" mov.l " new ", @" mem "\n" \
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"1: mov r1, r15\n"
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#define CPU_HAS_LLSC 0x0040
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int __sh_cas(volatile int *p, int t, int s)
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{
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int old;
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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LLSC_START("%1")
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" mov r0, %0\n"
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" cmp/eq %0, %2\n"
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" bf 1f\n"
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" mov %3, r0\n"
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LLSC_END("%1")
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: "=&r"(old) : "r"(p), "r"(t), "r"(s) : LLSC_CLOBBERS);
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} else {
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__asm__ __volatile__(
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GUSA_START_EVEN("%1", "%0")
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" cmp/eq %0, %2\n"
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" bf 1f\n"
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GUSA_END("%1", "%3")
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: "=&r"(old) : "r"(p), "r"(t), "r"(s) : GUSA_CLOBBERS, "t");
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}
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return old;
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}
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int __sh_swap(volatile int *x, int v)
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{
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int old;
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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LLSC_START("%1")
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" mov r0, %0\n"
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" mov %2, r0\n"
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LLSC_END("%1")
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: "=&r"(old) : "r"(x), "r"(v) : LLSC_CLOBBERS);
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} else {
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__asm__ __volatile__(
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GUSA_START_EVEN("%1", "%0")
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GUSA_END("%1", "%2")
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: "=&r"(old) : "r"(x), "r"(v) : GUSA_CLOBBERS);
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}
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return old;
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}
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int __sh_fetch_add(volatile int *x, int v)
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{
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int old, dummy;
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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LLSC_START("%1")
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" mov r0, %0\n"
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" add %2, r0\n"
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LLSC_END("%1")
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: "=&r"(old) : "r"(x), "r"(v) : LLSC_CLOBBERS);
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} else {
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__asm__ __volatile__(
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GUSA_START_EVEN("%2", "%0")
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" mov %0, %1\n"
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" add %3, %1\n"
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GUSA_END("%2", "%1")
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: "=&r"(old), "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
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}
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return old;
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}
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void __sh_store(volatile int *p, int x)
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{
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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" mov.l %1, @%0\n"
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" synco\n"
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: : "r"(p), "r"(x) : "memory");
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} else {
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__asm__ __volatile__(
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" mov.l %1, @%0\n"
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: : "r"(p), "r"(x) : "memory");
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}
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}
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void __sh_and(volatile int *x, int v)
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{
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int dummy;
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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LLSC_START("%0")
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" and %1, r0\n"
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LLSC_END("%0")
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: : "r"(x), "r"(v) : LLSC_CLOBBERS);
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} else {
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__asm__ __volatile__(
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GUSA_START_ODD("%1", "%0")
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" and %2, %0\n"
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GUSA_END("%1", "%0")
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: "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
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}
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}
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void __sh_or(volatile int *x, int v)
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{
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int dummy;
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if (__hwcap & CPU_HAS_LLSC) {
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__asm__ __volatile__(
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LLSC_START("%0")
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" or %1, r0\n"
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LLSC_END("%0")
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: : "r"(x), "r"(v) : LLSC_CLOBBERS);
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} else {
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__asm__ __volatile__(
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GUSA_START_ODD("%1", "%0")
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" or %2, %0\n"
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GUSA_END("%1", "%0")
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: "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
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}
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}
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