mirror of
https://github.com/fluencelabs/musl
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1b9406b03c
commit 06fbefd10046a0fae7e588b7c6d25fb51811b931 (first included in release 1.1.17) introduced this regression. patch by Adrian Bunk. it fixes the regression in all cases, but spuriously prevents use of the clz instruction on very old compiler versions that don't define __ARM_ARCH. this may be fixed in a more general way at some point in the future. it also omits thumb1 logic since building as thumb1 code is currently not supported.
95 lines
1.9 KiB
C
95 lines
1.9 KiB
C
#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
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#define BLX "mov lr,pc\n\tbx"
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#else
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#define BLX "blx"
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#endif
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extern uintptr_t __attribute__((__visibility__("hidden")))
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__a_cas_ptr, __a_barrier_ptr;
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#if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6ZK__) && !__thumb__) \
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|| __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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#define a_ll a_ll
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static inline int a_ll(volatile int *p)
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{
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int v;
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__asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
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return v;
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}
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#define a_sc a_sc
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static inline int a_sc(volatile int *p, int v)
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{
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int r;
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__asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
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return !r;
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}
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#if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__ ("dmb ish" : : : "memory");
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}
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#endif
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#define a_pre_llsc a_barrier
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#define a_post_llsc a_barrier
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#else
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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for (;;) {
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register int r0 __asm__("r0") = t;
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register int r1 __asm__("r1") = s;
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register volatile int *r2 __asm__("r2") = p;
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register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
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int old;
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__asm__ __volatile__ (
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BLX " r3"
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: "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
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: "memory", "lr", "ip", "cc" );
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if (!r0) return t;
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if ((old=*p)!=t) return old;
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}
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}
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#endif
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#ifndef a_barrier
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
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__asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
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}
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#endif
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__(
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#ifndef __thumb__
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".word 0xe7f000f0"
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#else
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".short 0xdeff"
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#endif
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: : : "memory");
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}
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#if __ARM_ARCH >= 5
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#define a_clz_32 a_clz_32
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static inline int a_clz_32(uint32_t x)
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{
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__asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
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return x;
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}
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#endif
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