arm assembly changes for clang compatibility

This commit is contained in:
Joakim Sindholt
2014-11-06 18:57:56 +01:00
committed by Rich Felker
parent 4134c68dd4
commit 27828f7e9a
3 changed files with 32 additions and 32 deletions

View File

@ -20,7 +20,7 @@ longjmp:
ldc p2, cr4, [ip], #48 ldc p2, cr4, [ip], #48
2: tst r1,#0x40 2: tst r1,#0x40
beq 2f beq 2f
ldc p11, cr8, [ip], #64 .inst 0xecbc8b10 /* vldmia ip!, {d8-d15} */
2: tst r1,#0x200 2: tst r1,#0x200
beq 3f beq 3f
ldcl p1, cr10, [ip], #8 ldcl p1, cr10, [ip], #8

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@ -22,7 +22,7 @@ setjmp:
stc p2, cr4, [ip], #48 stc p2, cr4, [ip], #48
2: tst r1,#0x40 2: tst r1,#0x40
beq 2f beq 2f
stc p11, cr8, [ip], #64 .inst 0xecac8b10 /* vstmia ip!, {d8-d15} */
2: tst r1,#0x200 2: tst r1,#0x200
beq 3f beq 3f
stcl p1, cr10, [ip], #8 stcl p1, cr10, [ip], #8

View File

@ -73,12 +73,12 @@ memcpy:
*/ */
movs r12, r3, lsl #31 movs r12, r3, lsl #31
sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */ sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
ldrmib r3, [r1], #1 ldrbmi r3, [r1], #1
ldrcsb r4, [r1], #1 ldrbcs r4, [r1], #1
ldrcsb r12,[r1], #1 ldrbcs r12,[r1], #1
strmib r3, [r0], #1 strbmi r3, [r0], #1
strcsb r4, [r0], #1 strbcs r4, [r0], #1
strcsb r12,[r0], #1 strbcs r12,[r0], #1
src_aligned: src_aligned:
@ -101,10 +101,10 @@ src_aligned:
/* conditionnaly copies 0 to 7 words (length in r3) */ /* conditionnaly copies 0 to 7 words (length in r3) */
movs r12, r3, lsl #28 movs r12, r3, lsl #28
ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */ ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */
ldmmiia r1!, {r8, r9} /* 8 bytes */ ldmiami r1!, {r8, r9} /* 8 bytes */
stmcsia r0!, {r4, r5, r6, r7} stmiacs r0!, {r4, r5, r6, r7}
stmmiia r0!, {r8, r9} stmiami r0!, {r8, r9}
tst r3, #0x4 tst r3, #0x4
ldrne r10,[r1], #4 /* 4 bytes */ ldrne r10,[r1], #4 /* 4 bytes */
strne r10,[r0], #4 strne r10,[r0], #4
@ -171,18 +171,18 @@ less_than_32_left:
/* conditionnaly copies 0 to 31 bytes */ /* conditionnaly copies 0 to 31 bytes */
movs r12, r2, lsl #28 movs r12, r2, lsl #28
ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */ ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */
ldmmiia r1!, {r8, r9} /* 8 bytes */ ldmiami r1!, {r8, r9} /* 8 bytes */
stmcsia r0!, {r4, r5, r6, r7} stmiacs r0!, {r4, r5, r6, r7}
stmmiia r0!, {r8, r9} stmiami r0!, {r8, r9}
movs r12, r2, lsl #30 movs r12, r2, lsl #30
ldrcs r3, [r1], #4 /* 4 bytes */ ldrcs r3, [r1], #4 /* 4 bytes */
ldrmih r4, [r1], #2 /* 2 bytes */ ldrhmi r4, [r1], #2 /* 2 bytes */
strcs r3, [r0], #4 strcs r3, [r0], #4
strmih r4, [r0], #2 strhmi r4, [r0], #2
tst r2, #0x1 tst r2, #0x1
ldrneb r3, [r1] /* last byte */ ldrbne r3, [r1] /* last byte */
strneb r3, [r0] strbne r3, [r0]
/* we're done! restore everything and return */ /* we're done! restore everything and return */
1: ldmfd sp!, {r5-r11} 1: ldmfd sp!, {r5-r11}
@ -224,11 +224,11 @@ non_congruent:
* becomes aligned to 32 bits (r5 = nb of words to copy for alignment) * becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
*/ */
movs r5, r5, lsl #31 movs r5, r5, lsl #31
strmib r3, [r0], #1 strbmi r3, [r0], #1
movmi r3, r3, lsr #8 movmi r3, r3, lsr #8
strcsb r3, [r0], #1 strbcs r3, [r0], #1
movcs r3, r3, lsr #8 movcs r3, r3, lsr #8
strcsb r3, [r0], #1 strbcs r3, [r0], #1
movcs r3, r3, lsr #8 movcs r3, r3, lsr #8
cmp r2, #4 cmp r2, #4
@ -355,23 +355,23 @@ less_than_thirtytwo:
partial_word_tail: partial_word_tail:
/* we have a partial word in the input buffer */ /* we have a partial word in the input buffer */
movs r5, lr, lsl #(31-3) movs r5, lr, lsl #(31-3)
strmib r3, [r0], #1 strbmi r3, [r0], #1
movmi r3, r3, lsr #8 movmi r3, r3, lsr #8
strcsb r3, [r0], #1 strbcs r3, [r0], #1
movcs r3, r3, lsr #8 movcs r3, r3, lsr #8
strcsb r3, [r0], #1 strbcs r3, [r0], #1
/* Refill spilled registers from the stack. Don't update sp. */ /* Refill spilled registers from the stack. Don't update sp. */
ldmfd sp, {r5-r11} ldmfd sp, {r5-r11}
copy_last_3_and_return: copy_last_3_and_return:
movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */ movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
ldrmib r2, [r1], #1 ldrbmi r2, [r1], #1
ldrcsb r3, [r1], #1 ldrbcs r3, [r1], #1
ldrcsb r12,[r1] ldrbcs r12,[r1]
strmib r2, [r0], #1 strbmi r2, [r0], #1
strcsb r3, [r0], #1 strbcs r3, [r0], #1
strcsb r12,[r0] strbcs r12,[r0]
/* we're done! restore sp and spilled registers and return */ /* we're done! restore sp and spilled registers and return */
add sp, sp, #28 add sp, sp, #28