musl/arch/aarch64/bits/hwcap.h

#define HWCAP_FP		(1 << 0)
#define HWCAP_ASIMD		(1 << 1)
#define HWCAP_EVTSTRM		(1 << 2)
#define HWCAP_AES		(1 << 3)
#define HWCAP_PMULL		(1 << 4)
#define HWCAP_SHA1		(1 << 5)
#define HWCAP_SHA2		(1 << 6)
#define HWCAP_CRC32		(1 << 7)
#define HWCAP_ATOMICS		(1 << 8)
#define HWCAP_FPHP		(1 << 9)
#define HWCAP_ASIMDHP		(1 << 10)
#define HWCAP_CPUID		(1 << 11)
#define HWCAP_ASIMDRDM		(1 << 12)
add bits/hwcap.h and include it in sys/auxv.h aarch64, arm, mips, mips64, mipsn32, powerpc, powerpc64 and sh have cpu feature bits defined in linux for AT_HWCAP auxv entry, so expose those in sys/auxv.h it seems the mips hwcaps were never exposed to userspace neither by linux nor by glibc, but that's most likely an oversight. 2016-10-09 20:42:02 +02:00			`#define HWCAP_FP (1 << 0)`
			`#define HWCAP_ASIMD (1 << 1)`
			`#define HWCAP_EVTSTRM (1 << 2)`
			`#define HWCAP_AES (1 << 3)`
			`#define HWCAP_PMULL (1 << 4)`
			`#define HWCAP_SHA1 (1 << 5)`
			`#define HWCAP_SHA2 (1 << 6)`
			`#define HWCAP_CRC32 (1 << 7)`
			`#define HWCAP_ATOMICS (1 << 8)`
			`#define HWCAP_FPHP (1 << 9)`
			`#define HWCAP_ASIMDHP (1 << 10)`
update aarch64 hwcap.h for linux v4.11 new hwcap bits were added in kernel commits 77c97b4ee21290f5f083173d957843b615abbff2 f92f5ce01ee6a6a86cbfc4e3b0d18529c302b1ea 2017-06-17 21:23:57 +00:00			`#define HWCAP_CPUID (1 << 11)`
			`#define HWCAP_ASIMDRDM (1 << 12)`